| Lifecycle Status |
PRODUCTION (Last Updated: 1 month ago) |
| Factory Lead Time |
8 Weeks |
| Contact Plating |
Tin |
| Mounting Type |
Surface Mount |
| Package / Case |
72-VFQFN Exposed Pad, CSP |
| Surface Mount |
YES |
| Number of Pins |
72 |
| Number of Elements |
2 |
| Operating Temperature |
-40°C~85°C |
| Packaging |
Tray |
| JESD-609 Code |
e3 |
| Lead Free Code |
no |
| Part Status |
Active |
| Moisture Sensitivity Level (MSL) |
3 (168 Hours) |
| Number of Terminations |
72 |
| ECCN Code |
EAR99 |
| Voltage – Supply |
1.71V~3.465V |
| Terminal Position |
QUAD |
| Peak Reflow Temperature (°C) |
260 |
| Number of Functions |
1 |
| Supply Voltage |
3.3V |
| Terminal Pitch |
0.5mm |
| Frequency |
1GHz |
| Time @ Peak Reflow Temperature – Max (s) |
40 |
| Base Part Number |
AD9523 |
| Output Types |
HSTL, LVCMOS, LVDS, LVPECL |
| Pin Count |
72 |
| Number of Outputs |
14 |
| Operating Supply Voltage |
3.3V |
| Power Supply Voltage – Maximum (Vsup) |
3.465V |
| Number of Circuits |
1 |
| Supply Current |
77.7mA |
| Maximum Supply Current |
77.7mA |
| Family |
952 |
| Inputs |
CMOS |
| Ratio – Input:Output |
2:14 |
| Logic IC Type |
PLL-Based Clock Driver |
| Phase Locked Loop |
Yes |
| Differential – Input:Output |
Yes/Yes |
| Primary Purpose |
Ethernet, Fibre Channel, SONET/SDH |
| Same Side Skew – Max (tskwd) |
0.3 ns |
| Height |
950μm |
| Length |
10.1mm |
| Width |
10.1mm |
| SVHC Compliance |
No SVHC |
| Radiation Hardening |
None |
| RoHS Status |
ROHS3 Compliant |
| Lead Free |
Lead Containing |
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