描述
| Parameter | Value |
|---|---|
| Part Family | SAME53 |
| CPU Type | Cortex-M4F |
| MaxSpeed (MHz) | 120 |
| Program Memory Size (KB) | 1024 |
| SRAM (KB) | 256 |
| Temp. Range Min. | -40 |
| Temp. Range Max. | 105 |
| Operation Voltage Min.(V) | 1.7 |
| Operation Voltage Max.(V) | 3.6 |
| SPI | 5 |
| I2C | 3 |
| UART | 8 |
| QSPI | 1 |
| Crypto Engine | Yes |
| Internal Oscillator | 4,8,12Mhz, 32Khz |
| Pin Count | 64 |
| Secure Boot | No |
| Category | Details |
|---|---|
| Operating Conditions | 1.71V to 3.63V, -40°C to +125°C, DC to 100 MHz 1.71V to 3.63V, -40°C to +105°C, DC to 120 MHz 1.71V to 3.63V, -40°C to +85°C, DC to 120 MHz |
| Core | 120 MHz Arm Cortex-M4 403 CoreMark® at 120 MHz 4 KB combined instruction cache and data cache 8-Zone Memory Protection Unit (MPU) Thumb®-2 instruction set Embedded Trace Module (ETM) with instruction trace stream Core Sight Embedded Trace Buffer (ETB) Trace Port Interface Unit (TPIU) Floating Point Unit (FPU) |
| Memories | 1 MB/512 KB/256 KB in-system self-programmable Flash with: – Error Correction Code (ECC) – Dual bank with Read-While-Write (RWW) support – EEPROM hardware emulation (SmartEEPROM) 128 KB, 192 KB, 256 KB SRAM main memory – 64 KB, 96 KB, 128 KB of Error Correction Code (ECC) RAM option Up to 4 KB of Tightly Coupled Memory (TCM) Up to 8 KB additional SRAM – Can be retained in backup mode Eight 32-bit backup registers |
| System | Power-on Reset (POR) and Brown-out detection (BOD) Internal and external clock options External Interrupt Controller (EIC) 16 external interrupts One non-maskable interrupt Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface |
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