描述
| Category | Sub-Category | Specifications |
|---|---|---|
| Operating Characteristics | Voltage Range | 2.7V to 5.5V |
| Temperature Range | – HSRUN mode: -40°C to 105°C – RUN mode: -40°C to 125°C |
|
| Core Platform | Processor | – Arm® Cortex®-M4F 32-bit CPU @ 120MHz (HSRUN mode) – 1.25 DMIPS/MHz performance – Armv7 architecture with Thumb®-2 ISA |
| Processing Units | – Integrated DSP instructions – Single-precision FPU – Configurable NVIC |
|
| Memory | Program Memory | – Up to 2MB Flash with ECC |
| Data Storage | – 64KB FlexNVM for: • ECC-protected data Flash • EEPROM emulation |
|
| System RAM | – Up to 256KB SRAM with ECC – 4KB FlexRAM (configurable as SRAM/EEPROM) |
|
| Performance | – 4KB code cache for reduced latency – QuadSPI with HyperBus™ support |
| Category | Sub-Category | Specifications |
|---|---|---|
| Peripherals | Analog | – Up to 2x ADCs with 32 analog input channels each – 1x analog comparator (CMP) with built-in 8-bit DAC |
| HMI | – Up to 128 GPIO pins with interrupt capability – Non-Maskable Interrupt (NMI) |
|
| Communication | – 3x LPUART modules (LIN capable) with DMA and low-power mode – 3x LPSPI modules with DMA and low-power mode – 2x LPI2C modules with DMA and low-power mode – 3x FlexCAN modules (CAN FD optional) – FlexIO module (supports UART, I2C, SPI, I2S, LIN, PWM) – 10/100Mbps Ethernet with IEEE1588 – 2x SAI modules |
|
| Functional Safety & Security | Cryptography | – EdgeLock Accelerator (CSEc) for: • Secure boot • Secure provisioning • Secure updates • Secure debugging |
| Device Identity | – 128-bit Unique ID (UID) | |
| Memory Protection | – ECC on Flash and SRAM – System Memory Protection Unit (MPU) |
|
| Monitoring | – CRC module – Internal Watchdog (WDOG) – External Watchdog Monitor (EWM) |
|
| Packaging | Options | – LQFP48: 7×7×1.4mm, 0.5mm pitch – LQFP64: 10×10×1.4mm, 0.5mm pitch – LQFP100: 14×14×1.4mm, 0.5mm pitch – LQFP144: 20×20×1.4mm, 0.5mm pitch |
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