描述
| Category | Sub-Category | Specifications |
|---|---|---|
| Core Platform | Processing Accelerators | – SmartDMA coprocessor for: • Parallel camera interface • Keypad scanning |
| Memory | – 1MB (2×512KB banks) on-chip Flash with: • Swap capability • Read While Write – 16KB RAM cache engine – 363KB RAM (288KB ECC-capable): • Single-bit correction • Two-bit detection – 4×8KB ECC RAM retainable in VBAT mode – 258KB ROM with secure bootloader |
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| Peripherals | Analog | – 2×16-bit ADCs: • 4 parallel conversions • Configurable as: – 2× single-ended per ADC – 1× differential per ADC – Throughput: • 2Mbps (18-bit mode) • 315Mbps (12-bit mode) – Up to 81 input channels (package-dependent) – 1 temp sensor per ADC – 2 high-speed comparators: • 11 input pins • 8-bit reference DAC – Operational in deep power-down – VREF accuracy: ±2mV (15ppm/°C drift) |
| Timers | – 5×32-bit general-purpose timers: • 4 capture/compare channels • PWM generation • External count input • DMA event triggering – Low-Power Timer (LPTMR) – Frequency measurement – Multi-Rate Timer – Windowed Watchdog – RTC with calendar – Wake Timer – Micro-Tick Timer (µTCK) – OS Event Timer |
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| Communication | – USB 2.0 High-Speed: • Host/Device modes • Integrated HS PHY – 8×LP FlexComm interfaces: • SPI/I²C/UART configurable – 2×FlexCAN with FD – 2×I²C controllers |
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| HMI | – FlexIO programmable interface: • Display drivers • Camera interfaces • Custom serial/parallel – 2×Serial Audio Interface (SAI) – PDM microphone interface: • Supports 4 MEMS mics |
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| Motor Control | – 2×FlexPWM modules: • 4 submodules each • 12 total PWM outputs – 2×Quadrature Decoder (QDC) – Event Generator: • 8 trigger outputs • Supports ADC/DAC/INVERT |
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| Security | EdgeLock® Secure Enclave | – Cryptographic services: • AES-256 • SHA-2 • ECC NIST P-256 • TRNG • Key generation/derivation |
| Key Management | – Secure key storage with usage policies – PUF-based device identity – DICE attestation – TLS 1.2/1.3 support – OTA key management via EdgeLock 2GO |
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| Secure Boot | – Hardware-accelerated PKC – Dual boot modes: • Asymmetric (RSA/ECC) • Post-quantum symmetric – Secure firmware updates – Lifecycle management |
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| Protection | – Memory encryption/authentication – PFR (Protected Flash Region) – 2× Code Watchdog timers – ITRC with tamper detection: • 6× tamper pins • Multi-domain sensors • Glitch detection |
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| TrustZone | – Arm TrustZone® for Cortex®-M – Secure/non-secure partitioning |
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| Packaging | – VFBGA196: 9.8×9.8mm, 0.5mm pitch – HLQFP100: 14.4×14.4mm, 0.5mm pitch |
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