描述
| Category | Sub-Category | Specifications |
|---|---|---|
| Core Platform | – Arm® Cortex®-M33 @ 150 MHz (Dual core) – DSP Accelerator (PowerQUAD with Co-Processor interface) – SmartDMA for parallel camera/keypad scanning – eIQ® Neutron NI-16 Neural Processing Unit – Power Line Communications (PLC) Controller |
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| Memory | – 2MB (2×1MB banks) on-chip Flash with swap/RWW support – 16KB RAM cache engine – 512KB RAM (416KB ECC-capable) – 4×8KB ECC RAM retainable in VBAT mode – FlexSPI with 16KB cache (supports XIP, Octal/Quad SPI, HyperFlash, HyperRAM) |
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| Peripherals | Analog | – 4×18-bit ADC (SE) / 2×18-bit (Diff) – 2Mbps (16-bit) / 3.3Mbps (12-bit) – Temp sensor per ADC – 3 high-speed comparators + 8-bit ref DAC – 2×12-bit DAC + 1×14-bit DAC @10MS/s – 3 configurable Op-Amps (PGA/Diff/Instr/Transconductance) – VREF ±0.15% (15ppm/°C) |
| Timers | – 5×32-bit GP timers (4 cap/comp, PWM, DMA) – SCTimer/PWM, LPTimer – Frequency measurement/Multi-Rate Timer – Windowed Watchdog, RTC, Micro/OS Event Timers |
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| Communication | – USB 2.0 HS/FS with PHY – µSDHC, 4×LP FlexComm (SPI/I²C/UART) – 2×FlexCAN FD, 2×I²S/SAI – Ethernet QoS, FlexIO (display/camera) – 2×Smart Card, PLU |
|
| Motor Control | – 2×eFlexPWM (12 outputs) – 2×Quadrature Encoder – Event Generator (8 triggers) – SINC Filter (3rd-order) |
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| Security | EdgeLock Secure Enclave | – Crypto: AES-256/SHA-2/ECC P-256/TRNG – PUF-based identity, DICE attestation – TLS, OTA key management (EdgeLock 2GO) |
| Secure Boot | – ROM-based immutable boot – Dual-mode (asymmetric/post-quantum) – Secure updates, lifecycle management |
|
| Protection | – Memory encryption/authentication – PFR, 2×Code Watchdog – ITRC with multi-domain tamper detection |
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| Packaging | – VFBGA196: 9×9mm – HLQFP100: 14×14mm – HDQFP72: 15.8×15.8mm |
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